Senior NPU Architect

About the Role

We are seeking a Senior NPU Architect to define the architecture of next-generation AI accelerators, focused on delivering high performance and power efficiency for advanced machine learning workloads.

You will drive architectural decisions across compute, memory hierarchy, interconnect, dataflow, and hardware/software co-design, enabling competitive performance for modern AI applications including CNNs, Transformers, multimodal models, and large-scale inference workloads.

This is a highly impactful role with significant ownership over core architectural strategy and long-term product direction.

Key Responsibilities

• Define overall NPU architecture and key design directions across:
  • Compute engines
  • Memory hierarchy
  • Interconnects
  • Execution model
• Analyze modern AI workloads and translate requirements into architectural trade-offs and design decisions
• Drive architecture modelling, bottleneck analysis, and design space exploration
• Partner closely with compiler, runtime, and algorithm teams on hardware/software co-design
• Guide architectural optimization across:
  • Performance
  • Power efficiency
  • Silicon area
  • Scalability
• Collaborate with RTL, verification, and software engineering teams to ensure successful implementation
• Evaluate emerging AI model trends and evolve architecture strategy accordingly
• Influence long-term technical roadmap and contribute to key product decisions

Qualifications

• MS or PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field
• 8+ years of experience in one or more of the following:
  • NPU architecture
  • GPU architecture
  • CPU architecture
  • ASIC design
  • Computer architecture
• Strong understanding of:
  • AI / ML workloads
  • Memory systems
  • Parallel processing
  • Performance optimisation
• Proven experience in:
  • Architecture definition
  • Performance modelling
  • Design trade-off analysis
  • Hardware/software co-design
• Familiarity with low-precision compute formats such as:
  • INT8
  • FP16
  • BF16
  • FP8
• Strong technical leadership and cross-functional communication skills

Preferred Qualifications

• Experience developing AI accelerators for:
  • Edge AI
  • High-performance compute
  • Large-scale inference systems
• Familiarity with AI compiler and runtime stacks
• Experience with workload mapping and execution optimisation
• Track record of:
  • Architectural innovation
  • Successful silicon delivery
  • Published technical contributions or patents

Opportunity

This is an opportunity to play a foundational role in shaping next-generation AI hardware, working at the intersection of computer architecture, machine learning systems, and hardware/software co-design.

You’ll join a deeply technical environment where your architectural decisions will directly influence the performance and capabilities of future AI platforms.